ENEE 646: Digital Computer Design by Peter Petrov

Fall 2007


Project topics.
This is not a complete list with project directions. The specific project description will be worked out and finalized based on the student background and interests. Please, email the instructor to setup an appointment if interested to work on a project. Students working on a project will not take Midterm-2; the project grade will be used instead.

Project specification for Design and Implementation of a simple pipelined RISC processor (using Verilog or VHDL).

RISC-16 Instruction Set Architecture. [pdf]
RISC-16 Assembler. [pdf] [C source]. Test RISC-16 assembly program [test.s]
RISC-16 Pipeline. [pdf]