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Ph.D. Dissertation Defense: Yanzhou Liu
Tuesday, August 14, 2018
11:00 a.m.
AVW 2328
For More Information:
Maria Hoo
301 405 3681

ANNOUNCEMENT:  Ph.D. Dissertation Defense
Name:  Yanzhou Liu
Professor Shuvra S. Bhattacharyya, Chair/Advisor
Professor Manoj Franklin
Professor Sennur Ulukus
Doctor Lee Barford
Professor Mihai Pop, Dean's Representative
Date/time:  Tuesday, August 14, 2018 at 11:00 am
Location:  AVW 2328
Title: Model-based design and implementation of deep waveform analysis systems
Analysis of signals of relatively long duration, an area that is referred to as deep waveform analysis, is of increasing importance in instrumentation systems for wireless communications. For example, jitter measurement of deep waveforms must be performed during design and manufacturing tests for complex communications circuitry or equipment. As requirements for bit error rate performance become more stringent and data volumes increase, it becomes increasingly important and interesting to perform deep waveform analysis computations in long, or even temporally unbounded, waveforms. 
Real-time response and limited hardware resources challenge the design methods of deep waveform analysis systems. Previous methods for deep waveform analysis required storage and computation across all samples of the waveform at once. However, as the amount of data in the waveform grows, and especially if the waveform is unbounded, storage of the waveform in its entirety becomes impractical. 
The need to satisfy stringent real-time constraints, handle large volumes of data at high sample rates, and operate on resource-constrained platforms result in challenging problems in the development of advanced systems for deep waveform analysis.  In this thesis, we have developed new design methodologies and design optimization methods to address these problems.  The contributions of the thesis are geared toward handling large, possibly unbounded, signal data sets, and providing novel trade-offs among measurement accuracy, memory constraints, and real-time performance. Motivated by performance bottlenecks that we observed in our experimentation with deep waveform analysis, we have also developed a new model of computation for representing signal processing applications in a way that improves the efficiency of data communication between computational modules. 
The main contributions of this thesis are summarized in the following. 
(1). Design methodology for deep waveform analysis systems.  We have developed a new design methodology for deep waveform analysis under limited resources. The methodology builds on the formalisms of dataflow-based design and implementation of signal processing systems. Our proposed methodology is shown to help significantly advance the prior state of the art in jitter measurement system design, and it forms an important foundation for later contributions that are presented in the thesis.  Our approach is demonstrated through extensive experiments using actual measured data. Through its incorporation of high-level dataflow principles, the approach is suitable for efficient mapping to a variety of platforms, including multicore processors and graphics processing unit (GPU) devices for high performance signal processing.
(2). Design optimization for gapless deep waveform analysis.  We have developed novel models and design optimization methods for addressing the real-time processing challenges of gapless deep waveform applications.  A gapless signal processing application is characterized by one or more continuous streams of input data, where the data must be processed reliably without dropping any of the input samples.  The strict real-time processing requirements for gapless deep waveform applications can be very challenging when input data rates are high, processing requirements are intensive, or the target platform is significantly resource constrained.  The methods developed in this part of the thesis focus on optimizing the throughput of deep waveform analysis subject to the on-board memory constraints of a given data acquisition system interface, processor memory constraints, and the constraint of gapless processing.
(3). Passive-active flow graphs for dataflow-based implementation.  We introduce a new model of computation called passive-active flow graphs (PAFGs), which complement conventional dataflow-based application representations.  We have developed PAFGs to address important bottlenecks in dataflow graph implementation associated with communication between computational modules (dataflow graph vertices).  We demonstrate the use of PAFGs as an intermediate representation for refining dataflow graphs into efficient implementations.  We develop formal underpinnings of the PAFG model of computation, and introduce systematic transformation techniques for deriving and optimizing PAFG representations.

This Event is For: Graduate • Faculty

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