Event
Ph.D. Dissertation Defense: Reza Asrar Ghaderloo
Tuesday, November 10, 2026
10:30 a.m.
AVW 2168
Announcement: Ph.D. Dissertation Defense
Name: Reza Asrar Ghaderloo
Committee:
Professor Alireza Khaligh, Chair/Advisor
Professor Xin Zan
Professor Sahil Shah
Professor Behtash Babadi
Professor Damena Agonafer, Dean's Representative
Date/time: Tuesday, November 10 at 10:30 AM
Location: AVW-2168
Meeting ID: 455 933 3037
Title: End-to-End Design, Implementation and Reliability Validation of a Two-Stage Motor Controller Considering Avionics and Industrial Requirements
Abstract: The increasing global demand for more electric aircraft has opened up a multitude of opportunities for development of advanced power electronic interfaces in avionics. One important application is variable frequency drives (VFDs), in which variable-voltage, variable-frequency AC power generated by aircraft turbo-generators is used to precisely control three-phase motors or other electric loads. A typical VFD employs a two-stage topology consisting of a rectifier followed by a voltage source inverter (VSI), with an intermediate DC-link capacitor bank. Conventional VFD designs commonly use a diode bridge rectifier, which results in reduced efficiency, high input current harmonics, and limited DC-link voltage regulation. Replacing the diode rectifier with an active front-end power factor correction (PFC) stage enables significant improvements in modern designs. This approach enhances power quality, increases efficiency, and improves power density and reliability, while also offering potential thermal and cost benefits.
Abstract: The increasing global demand for more electric aircraft has opened up a multitude of opportunities for development of advanced power electronic interfaces in avionics. One important application is variable frequency drives (VFDs), in which variable-voltage, variable-frequency AC power generated by aircraft turbo-generators is used to precisely control three-phase motors or other electric loads. A typical VFD employs a two-stage topology consisting of a rectifier followed by a voltage source inverter (VSI), with an intermediate DC-link capacitor bank. Conventional VFD designs commonly use a diode bridge rectifier, which results in reduced efficiency, high input current harmonics, and limited DC-link voltage regulation. Replacing the diode rectifier with an active front-end power factor correction (PFC) stage enables significant improvements in modern designs. This approach enhances power quality, increases efficiency, and improves power density and reliability, while also offering potential thermal and cost benefits.
This Ph.D. dissertation focuses on the design and implementation of a 17 kVA VFD comprising a PFC rectifier followed by a VSI, with both stages based on the T-type topology. The system is designed to be powered from a variable-frequency, three-phase sinusoidal input voltage, which is first converted into a regulated DC voltage and subsequently used to generate a controllable three-phase output voltage with adjustable amplitude and frequency. The research aims to enhance the efficiency, power density, and reliability of VFDs for avionic applications by using T-type topology, multi-objective design space optimization, advanced control strategies, and integration of wide-bandgap (WBG) semiconductor technologies.
The proposed research is carried out in multiple sections including 1- design, optimization and component selection of the AC-DC-AC converter, 2- electromagnetic interference (EMI) filter design and integration seeking to comply DO-160 avionic standard, 3- modulation methods assessment to improve the performance of T-type topology, 4- hardware prototype development, and 5- reliability tests and experimental validation. The motor controller accepts a nominal input voltage of 230 Vrms (line to neutral) having a variable frequency of 360 Hz to 800 Hz and the output voltage amplitude and frequency could be controllable from 0 to 180 Vrms (line to neutral) and 0 to 1000 Hz, respectively. The target maximum efficiency is >96% and the target gravimetric power density is 2 kW/kg. The circuit meets DO-160 conducted EMI requirements and it is air cooled in an ambient temperature of 60C.
