Event
Ph.D. Research Proposal Exam: Reza Asrar Ghaderloo
Wednesday, September 24, 2025
11:00 a.m.
Souad Nejjar
301 405 8135
snejjar@umd.edu
ANNOUNCEMENT: Ph.D. Research Proposal Exam
Name: Reza Asrar Ghaderloo
Committee:
Professor Alireza Khaligh (Chair)
Professor Xin Zan
Professor Sahil Shah
Date/time: Wednesday, September 24, 2025 at 11:00 AM
Title: A high power density two stage motor controller for avionic applications
Abstract: The increasing global demand for more electric aircraft with high efficiency, high power density and reliability has opened up a multitude of opportunities in terms of innovative design and realization of power electronic interfaces for avionic applications. One such application is variable frequency drives (VFD) where the variable voltage and variable frequency AC power from turbo generators is used to actively control three-phase motors. The approach for motor controller design typically uses a two-stage topology where a rectifier power factor correction (PFC) stage is followed by a voltage source inverter (VSI) with an intermediate DC-link capacitor bank. The conventional VFD designs use diode bridges for the rectifier stage leading to lower efficiency, high harmonic content in the input current, and a lack of DC-link voltage regulation. By replacing the diode rectifier with an active-front-end PFC, numerous electrical, thermal and cost benefits can be obtained in terms of power quality, efficiency, power density and reliability.
This Ph.D. research proposes the design and implementation of a 17kVA VFD consisting of a PFC rectifier followed by a VSI stage, with both stages based on the T-type topology. The system is intended to be powered by a variable-frequency three-phase sinusoidal input voltage which is first converted into a DC voltage and then used to generate a controllable three-phase output voltage with adjustable amplitude and frequency. The research seeks to increase the efficiency, power density and reliability of VFD for avionic applications by using T-type topology, multi-objective design space optimization, improved control and use of WBG semiconductor technologies.
The proposed research is carried out in multiple sections including 1- design, optimization and component selection of the AC-DC-AC converter, 2- hardware prototype development and experimental validation, 3- electromagnetic interference (EMI) filter design and integration seeking to comply DO-160 avionic standard, 4- modulation methods assessment to improve the performance of T-type topology, and 5- reliability tests. The motor controller accepts a nominal input voltage of 230 Vrms (line to neutral) having a variable frequency of 360 Hz to 800 Hz and the output voltage amplitude and frequency could be controllable from 0 to 180 Vrms (line to neutral) and 0 to 1000Hz, respectively. The target maximum efficiency is $\ge$96\% and the target gravimetric power density is 2 kW/kg. The circuit should meet DO-160 conducted EMI requirements and it should be air cooled in an ambient temperature of 65 \textdegree C.
The findings of this work provide valuable insights for future designers to adequately consider the adoption of the T-type topology, providing design guidance on device selection and control architecture to ease its implementation.
