Faculty Directory

Barua, Rajeev

Barua, Rajeev

Electrical and Computer Engineering
The Institute for Systems Research
Maryland Energy Innovation Institute
A.V. Williams 1431


Dr. Rajeev Barua is an Associate Professor of Electrical and Computer Engineering at the University of Maryland.   He holds a joint appointment the Institute for Systems Research, and an affiliate appointment in the Computer Science department, both in the University of Maryland.   He received his Ph.D in Computer Science and Electrical Engineering from the Massachusetts Institute of Technology in 2000.

Dr. Barua is a recipient of the NSF CAREER award in 2002, and of the UMD George Corcoran Award for teaching excellence in 2003. He was a finalist for the Inventor of the Year Award in 2005 given by the Office of Technology Commercialization at the University of Maryland. He received the President of India Gold Medal for graduating from the Indian Institute of Technology in 1992 with the highest GPA in the university that year.

He served as Workshops Chair for the ACM Conference on Compilers, Architecture, & Synthesis for Embedded Systems (CASES) in 2004. He also served as Program Co-Chair for the Workshop on Compilers and Tools for Constrained Embedded Systems (CTCES), also in 2004. Over the years, he have served on several NSF panels and on the program committees of several leading academic conferences.


    •    NSF CAREER Award (2002)
    •    George Corcoran Award (2003)
    •    Finalist, Inventor of the Year Award, University of Maryland (3 finalists among
 35 invention submissions) (2004)

Dr. Barua's research interests are in the areas of compilers, embedded systems, and computer architecture. Recent work has tackled the problem of compiler approaches to reliable software in embedded systems, memory allocation for embedded systems, and compiling to VLIW processors. Earlier work has targeted memory disambiguation technologies, instruction scheduling, ASIP customization, silicon compilation, instruction prefetching, partitioning of memory on multiprocessors, and a study of memory latency and bandwidth characteristics on multiprocessors.

Vishkin, Barua and Ghanim Introduce ICE to Eliminate Programmer’s Multi-Threading – A Productivity-Buster in Parallel Computing

Intermediate Concurrent Execution (ICE) enables tightly-synchronous threading-free programming for multi-threaded execution.

TEDCO Invests $1M into Innovative Companies Including Rajeev Barua’s Startup SecondWrite LLC

SecondWrite LLC has received TEDCO funding from the state of Maryland for an amount of $100,000.

UMD Startup Makes Strides in Cybersecurity

SecondWrite develops software to combat evasive malware

ECE Names 2014-2015 Distinguished Dissertation Fellows

Five Electrical and Computer Engineering Ph.D. students were selected as ECE Distinguished Dissertation Fellows for 2014-15.

Barua Wins NSF Grant for New Binary Rewriter

Professor's rewriter will allow any binary code to be rewritten and improved.

Barua, Fellow Researchers Win DARPA Funding for AESOP Project

UMD will collaborate with Princeton, BAE Systems to compile serial programs into parallel programs.

Barua, Vishkin Receive NSF Grant for Parallel Chip Multiprocessor Research

Profs. Rajeev Barua, PI, and Uzi Vishkin, co-PI, earn three-year, $400,000 award.

Barua Earns NSF Grant for Memory Management Research

Professor receives funding for exploring new techniques for memory allocation.