Credits: 3


Prerequisite: Minimum grade of C- in ENEE303; and must have earned a minimum grade of regular (letter) C- in all required 200-level ENEE courses; and permission of ENGR-Electrical & Computer Engineering department.
Restriction: Must be in one of the following programs (Engineering: Computer; Engineering: Electrical).
Characterization of wafers and fabrication steps. Oxide growth, lithography, dopant diffusion, and metal deposition and patterning will be discussed in the lectures and carried out in the lab in fabricating NMOS transistor circuits. The transistor characteristics will be measured and related to the fabrication parameters.

Semesters Offered

Fall 2017, Fall 2018, Fall 2019, Fall 2020, Fall 2021, Fall 2022, Fall 2023, Fall 2024

Learning Objectives

  • Provide students an understanding of how a silicon wafer is turned into an operating integrated circuit
  • Review transistor operation and the IC fabrication steps stressing how processing parameters affect transistor performance
  • Carry out the fabrication steps needed to produce transistors, resistors, and capacitors
  • Test the transistors and other related components that have been fabricated and investigate the effects of processing parameters

Topics Covered

  • Semiconductor device fundamentals
  • Lithography (resist spinning, contact aligner exposure, and development)
  • Oxide growth
  • Chemical vapor deposition
  • Reactive ion etching
  • Doping and dopant diffusion
  • Metal deposition and patterning
  • Analysis of fabricated devices
  • Silicon bulk and surface micromachining